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Intersil Electronic Components Datasheet

X9521 Datasheet

EEPROM Memory

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NOTPRXO9ES5CS8O2IBM0L,MEISESLN2UD2BE3S2DT6FI,T®IOSURLT2EN2EP3W2RD9O,DaDXtEaU9S5CSI2GTh0NeSet
Fiber Channel/Gigabit Ethernet Laser
Diode Control for Fiber Optic Modules
FEATURES
• Two Digitally Controlled Potentiometers (DCP’s)
—100 Tap - 10kΩ
—256 Tap - 100kΩ
— Non-Volatile
—Write Protect Function
• 2kbit EEPROM Memory with Write Protect & Block
LockTM
• 2-Wire industry standard Serial Interface
—Complies to the Gigabit Interface Converter
(GBIC) specification
• Single Supply Operation
—2.7V to 5.5V
• Hot Pluggable
• 20 Ld TSSOP
BLOCK DIAGRAM
X9521
Dual DCP, EEPROM Memory
January 3, 2006
FN8207.1
DESCRIPTION
The X9521 combines two Digitally Controlled Potentiom-
eters (DCP’s), and integrated EEPROM with Block
LockTM protection. All functions of the X9521 are
accessed by an industry standard 2-Wire serial interface.
The DCP’s of the X9521 may be utilized to control the
bias and modulation currents of the laser diode in a Fiber
Optic module. The 2kbit integrated EEPROM may be
used to store module definition data.
The features of the X9521 are ideally suited to simplifying
the design of fiber optic modules which comply to the Gi-
gabit Interface Converter (GBIC) specification. The inte-
gration of these functions into one package significantly
reduces board area, cost and increases reliability of laser
diode modules.
www.DataSheet4U.com
WP
SDA
SCL
DATA
REGISTER
COMMAND
DECODE &
CONTROL
LOGIC
THRESHOLD
RESET LOGIC
8
PROTECT LOGIC
CONSTAT
REGISTER
4
2kbit
EEPROM
ARRAY
WIPER
COUNTER
REGISTER
7 - BIT
NONVOLATILE
MEMORY
WIPER
COUNTER
REGISTER
8 - BIT
NONVOLATILE
MEMORY
RH1
RW1
RL1
RH2
RW2
RL2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
©2000 Intersil Inc., Patents Pending. Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.


Intersil Electronic Components Datasheet

X9521 Datasheet

EEPROM Memory

No Preview Available !

X9521
Ordering Information
PART NUMBER
PRESET (FACTORY SHIPPED) VTRIPx
PART MARKING
THRESHOLD LEVELS (x = 2, 3)
TEMP RANGE (°C)
PACKAGE
X9521V20I-A
X9521VIA
Optimized for 3.3V system monitoring
-40 to +85
20 Ld TSSOP
X9521V20I-B
X9521VIB
Optimized for 5V system monitoring
-40 to +85
20 Ld TSSOP
X9521V20IZ-A (Note)
X9521VZIA
Optimized for 3.3V system monitoring
-40 to +85
20 Ld TSSOP (Pb-free)
X9521V20IZ-B (Note)
X9521VZIB
Optimized for 5V system monitoring
-40 to +85
20 Ld TSSOP (Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN CONFIGURATION
RH2
RW2
RL2
NC
NC
NC
WP
SCL
SDA
VSS
20 Pin TSSOP
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
Vcc
NC
NC
NC
NC
NC
NC
RH1
RW1
RL1
PIN ASSIGNMENT
Pin Name
1 RH2
2 Rw2
3 RL2
7 WP
8
9
10
11
12
13
20
4, 5, 6,
14, 15,
16, 17,
18, 19
SCL
SDA
Vss
RL1
Rw1
RH1
Vcc
NC
Function
Connection to end of resistor array for (the 256 Tap) DCP 2.
Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 2.
Connection to other end of resistor array for (the 256 Tap) DCP2.
Write Protect Control Pin. WP pin is a TTL level compatible input. When held HIGH, Write Protection is
enabled. In the enabled state, this pin prevents all nonvolatile “write” operations. Also, when the Write Pro-
tection is enabled, and the device Block Lock feature is active (i.e. the Block Lock bits are NOT [0,0]), then
no “write” (volatile or nonvolatile) operations can be performed in the device (including the wiper position
of any of the integrated Digitally Controlled Potentiometers (DCPs). The WP pin uses an internal “pull-
down” resistor, thus if left floating the write protection feature is disabled.
Serial Clock. This is a TTL level compatible input pin used to control the serial bus timing for data input
and output.
Serial Data. SDA is a bidirectional TTL level compatible pin used to transfer data into and out of the de-
vice. The SDA pin input buffer is always active (not gated). This pin requires an external pull up resistor.
Ground.
Connection to other end of resistor for (the 100 Tap) DCP 1.
Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 1
Connection to end of resistor array for (the 100 Tap) DCP 1.
Supply Voltage.
No connect.
2 FN8207.1
January 3, 2006


Part Number X9521
Description EEPROM Memory
Maker Intersil Corporation
Total Page 24 Pages
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