Description
The MACH® 1 & 2 families from Lattice/Vantis offer high-performance, low cost Complex Programmable Logic Devices (CPLDs), addressing the growing need for speed in networking, telecommunications and computing.
Features
- x High-performance electrically-erasable CMOS PLD families x 32 to 128 macrocells x 44 to 100 pins in cost-effective PLCC, PQFP and TQFP packages x SpeedLocking™.
- guaranteed fixed timing up to 16 product terms x Commercial 5/5.5/6/7.5/10/12/15-ns tPD and Industrial 7.5/10/12/14/18-ns tPD x Configurable macrocells.
- Programmable polarity.
- Registered or combinatorial outputs.
- Internal and I/O feedback paths.
- D-type or T-type flip-flops.
- Output Enabl.