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ORSPI4 - Dual SPI4 Interface and High-Speed SERDES FPSC

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Lattice Semiconductor

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ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC by Lattice Semiconductor - Datasheet Preview — Datasheet preview – ORSPI4

Datasheet Details

Part number	ORSPI4
Manufacturer	Lattice Semiconductor
File Size	1.43 MB
Description	Dual SPI4 Interface and High-Speed SERDES FPSC
Datasheet	ORSPI4 Datasheet
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Product details

Features

OIF-SPI4-02.0 compliant interfaces Dynamic timing receive interface:.
Full bandwidth up to 450 MHz DDR (900 Mbits/s) for all speed grades.
Bit de-skewing up to 16 phases of the clock.
Capable of aligning bit-to-bit skews as large as ±1 bit periods Static timing receive interface:.
Speeds up to 325 MHz DDR (650 Mbits/s), for all speed grades, including Quarter-Rate mode.
Clock aligned or clock centered modes supported DIP-4 and DIP.

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Published: Feb 24, 2010 |