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PALCE16V8Z - EE CMOS 20-Pin Universal Programmable Array Logic

Download the PALCE16V8Z datasheet PDF (PALCE16V8 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for ee cmos 20-pin universal programmable array logic.

Description

erasable CMOS technology.

It is functionally compatible with all 20-pin GAL devices.

E macrocells provide a universal device architecture.

Features

  • of the PALCE16V8. In addition, the PALCE16V8Z A has zero standby power and an unused product term disable feature for reduced power G W consumption. It has eight independently configurable macrocells (MC0-MC7). Each macrocell can E be configured as registered output, combinatorial output, combinatorial I/O or dedicated input. E The programming matrix implements a programmable AND logic array, which drives a fixed OR S N logic array. Buffers for device inputs have complementary outputs to provide us.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PALCE16V8_LatticeSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number PALCE16V8Z
Manufacturer Lattice Semiconductor
File Size 634.90 KB
Description EE CMOS 20-Pin Universal Programmable Array Logic
Datasheet download datasheet PALCE16V8Z Datasheet

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Other Datasheets by Lattice Semiconductor
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Full PDF Text Transcription

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PALCE16V8 COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/15/25, Q-20/25 PALCE16V8Z COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS (Zero-Power) 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS x Pin and function compatible with all 20-pin PAL® devices x Electrically erasable CMOS technology provides reconfigurable logic and full testability x High-speed CMOS technology — 5-ns propagation delay for “-5” version — 7.
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