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Linear Technology Electronic Components Datasheet

LTC2185IUP Datasheet

Low Power Dual ADC

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Features
n Two-Channel Simultaneously Sampling ADC
n 76.8dB SNR
n 90dB SFDR
n Low Power: 370mW/308mW/200mW Total
185mW/154mW/100mW per Channel
n Single 1.8V Supply
n CMOS, DDR CMOS, or DDR LVDS Outputs
n Selectable Input Ranges: 1VP-P to 2VP-P
n 550MHz Full Power Bandwidth S/H
n Optional Data Output Randomizer
n Optional Clock Duty Cycle Stabilizer
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n 64-Pin (9mm × 9mm) QFN Package
Applications
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multi-Channel Data Acquisition
n Nondestructive Testing
LTC2185/LTC2184/LTC2183
16-Bit, 125/105/80Msps
Low Power Dual ADCs
Description
The LTC®2185/LTC2184/LTC2183 are two-channel si-
multaneous sampling 16-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 76.8dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.07psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 3.4LSBRMS.
The digital outputs can be either full rate CMOS, Double
Data Rate CMOS, or Double Data Rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
1.8V
VDD
CH 1
ANALOG
S/H
INPUT
16-BIT
ADC CORE
CH 2
ANALOG
INPUT
125MHz
CLOCK
S/H
16-BIT
ADC CORE
CLOCK
CONTROL
GND
1.8V
OVDD
OUTPUT
DRIVERS
D1_15
D1_0
D2_15
D2_0
CMOS,
DDR CMOS
OR DDR LVDS
OUTPUTS
OGND
218543 TA01a
2-Tone FFT, fIN = 70MHz and 69MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0 10 20 30 40 50 60
FREQUENCY (MHz)
218543 TA01b
218543f
1


Linear Technology Electronic Components Datasheet

LTC2185IUP Datasheet

Low Power Dual ADC

No Preview Available !

LTC2185/LTC2184/LTC2183
Absolute Maximum Ratings (Notes 1, 2)
Supply Voltages (VDD, OVDD)........................ –0.3V to 2V
Analog Input Voltage (AIN+, AIN–,
PAR/SER, SENSE) (Note 3)........... –0.3V to (VDD + 0.2V)
Digital Input Voltage (ENC+, ENC, CS,
SDI, SCK) (Note 4)..................................... –0.3V to 3.9V
SDO (Note 4)............................................. –0.3V to 3.9V
Digital Output Voltage................. –0.3V to (OVDD + 0.3V)
Operating Temperature Range
LTC2185C, 2184C, 2183C......................... 0°C to 70°C
LTC2185I, 2184I, 2183I........................ –40°C to 85°C
Storage Temperature Range.................... –65°C to 150°C
Pin ConfigurationS
FULL-RATE CMOS OUTPUT MODE
TOP VIEW
DOUBLE DATA RATE CMOS OUTPUT MODE
TOP VIEW
VDD 1
VCM1 2
GND 3
AIN1+ 4
AIN1– 5
GND 6
48 D1_5
47 D1_4
46 D1_3
45 D1_2
44 D1_1
43 D1_0
VDD 1
VCM1 2
GND 3
AIN1+ 4
AIN1– 5
GND 6
48 D1_4_5
47 DNC
46 D1_2_3
45 DNC
44 D1_0_1
43 DNC
REFH 7
42 OVDD
REFH 7
42 OVDD
REFL 8
65
41 OGND
REFL 8
65
41 OGND
REFH 9
GND
40 CLKOUT+
REFH 9
GND
40 CLKOUT+
REFL 10
39 CLKOUT
REFL 10
39 CLKOUT
PAR/SER 11
AIN2+ 12
AIN2– 13
GND 14
38 D2_15
37 D2_14
36 D2_13
35 D2_12
PAR/SER 11
AIN2+ 12
AIN2– 13
GND 14
38 D2_14_15
37 DNC
36 D2_12_13
35 DNC
VCM2 15
VDD 16
34 D2_11
33 D2_10
VCM2 15
VDD 16
34 D2_10_11
33 DNC
UP PACKAGE
64-LEAD (9mm × 9mm) PLASTIC QFN
TJMAX = 150°C, θJA = 20°C/W
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
UP PACKAGE
64-LEAD (9mm × 9mm) PLASTIC QFN
TJMAX = 150°C, θJA = 20°C/W
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
218543f
2


Part Number LTC2185IUP
Description Low Power Dual ADC
Maker Linear Technology
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