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LTC2232 - 10-Bit ADCs

Key Features

  • Sample Rate: 105Msps/80Msps.
  • 61dB SNR up to 140MHz Input.
  • 75dB SFDR up to 200MHz Input.
  • 775MHz Full Power Bandwidth S/H.
  • Single 3.3V Supply.
  • Low Power Dissipation: 475mW/366mW.
  • Selectable Input Ranges: ±0.5V or ±1V.
  • No Missing Codes.
  • Optional Clock Duty Cycle Stabilizer.
  • Shutdown and Nap Modes.
  • Data Ready Output Clock.
  • Pin Compatible Family 135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit) 105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit) 80Msps:.

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Full PDF Text Transcription for LTC2232 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for LTC2232. For precise diagrams, and layout, please refer to the original PDF.

FEATURES ■ Sample Rate: 105Msps/80Msps ■ 61dB SNR up to 140MHz Input ■ 75dB SFDR up to 200MHz Input ■ 775MHz Full Power Bandwidth S/H ■ Single 3.3V Supply ■ Low Power Dis...

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■ 775MHz Full Power Bandwidth S/H ■ Single 3.3V Supply ■ Low Power Dissipation: 475mW/366mW ■ Selectable Input Ranges: ±0.5V or ±1V ■ No Missing Codes ■ Optional Clock Duty Cycle Stabilizer ■ Shutdown and Nap Modes ■ Data Ready Output Clock ■ Pin Compatible Family 135Msps: LTC2224 (12-Bit), LTC2234 (10-Bit) 105Msps: LTC2222 (12-Bit), LTC2232 (10-Bit) 80Msps: LTC2223 (12-Bit), LTC2233 (10-Bit) ■ 48-Pin 7mm x 7mUm QFN Package APPLICATIO S ■ Wireless and Wired Broadband Communication ■ Cable Head-End Systems ■ Power Amplifier Linearization ■ Communications Test Equipment TYPICAL APPLICATIO REFH REFL FLEXIBLE REFERENCE 3.