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MACRONIX

MX25L6435E Datasheet Preview

MX25L6435E Datasheet

64M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY

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MX25L6435E
MX25L6435E
3V, 64M-BIT [x 1/x 2/x 4]
CMOS MXSMIO® (SERIAL MULTI I/O)
FLASH MEMORY
Key Features
• Hold Feature
• Multi I/O Support - Single I/O, Dual I/O and Quad I/O
• Auto Erase and Auto Program Algorithms
• Continuous Program mode
P/N: PM1784
Rev. 1.7, October 03, 2016
1




MACRONIX

MX25L6435E Datasheet Preview

MX25L6435E Datasheet

64M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY

No Preview Available !

MX25L6435E
Contents
1. FEATURES......................................................................................................................................................... 4
2. GENERAL DESCRIPTION................................................................................................................................ 6
Table 1. Read Performance....................................................................................................................6
3. PIN CONFIGURATION....................................................................................................................................... 7
4. PIN DESCRIPTION............................................................................................................................................. 7
5. BLOCK DIAGRAM.............................................................................................................................................. 8
6. DATA PROTECTION........................................................................................................................................... 9
Table 2. Protected Area Sizes...............................................................................................................10
Table 3. 4K-bit Secured OTP Definition................................................................................................ 11
7. MEMORY ORGANIZATION.............................................................................................................................. 12
Table 4. Memory Organization..............................................................................................................12
8. DEVICE OPERATION....................................................................................................................................... 13
9. HOLD FEATURE............................................................................................................................................... 14
10. COMMAND DESCRIPTION............................................................................................................................ 15
Table 5. Command Sets........................................................................................................................15
10-1. Write Enable (WREN)...........................................................................................................................18
10-2. Write Disable (WRDI)............................................................................................................................19
10-3. Read Identification (RDID)....................................................................................................................20
10-4. Read Status Register (RDSR)..............................................................................................................21
10-5. Read Configuration Register (RDCR)...................................................................................................22
Table 6. Status Register........................................................................................................................23
10-6. Write Status Register (WRSR)..............................................................................................................25
Table 7. Protection Modes.....................................................................................................................26
10-7. Read Data Bytes (READ).....................................................................................................................28
10-8. Read Data Bytes at Higher Speed (FAST_READ)...............................................................................29
10-9. Dual Read Mode (DREAD)...................................................................................................................30
10-10. 2 x I/O Read Mode (2READ)................................................................................................................31
10-11. Quad Read Mode (QREAD).................................................................................................................32
10-12. 4 x I/O Read Mode (4READ)................................................................................................................33
10-13. Performance Enhance Mode................................................................................................................34
10-14. Sector Erase (SE).................................................................................................................................37
10-15. Block Erase (BE)..................................................................................................................................38
10-16. Block Erase (BE32K)............................................................................................................................39
10-17. Chip Erase (CE)....................................................................................................................................40
10-18. Page Program (PP)..............................................................................................................................41
10-19. 4 x I/O Page Program (4PP).................................................................................................................42
10-20. Continuous Program mode (CP mode).................................................................................................45
10-21. Deep Power-down (DP)........................................................................................................................47
10-22. Release from Deep Power-down (RDP), Read Electronic Signature (RES)........................................48
10-23. Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4)......................................50
10-24. ID Read.................................................................................................................................................51
Table 8. ID Definitions ..........................................................................................................................51
10-25. Enter Secured OTP (ENSO).................................................................................................................51
10-26. Exit Secured OTP (EXSO)....................................................................................................................51
10-27. Read Security Register (RDSCUR)......................................................................................................52
Table 9. Security Register Definition.....................................................................................................53
P/N: PM1784
Rev. 1.7, October 03, 2016
2


Part Number MX25L6435E
Description 64M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY
Maker MACRONIX
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