Datasheet Summary
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32bit CPU, 64Kbyte EEPROM, 256Kbyte ROM, 8Kbyte RAM
Features z CPU
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ARM SC100 32 bit pipelined RISC processor ARM 32 bit / Thumb 16 bit instruction set z Integrated On-Chip Memory
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- 256Kbyte ROM 64Kbyte EEPROM 8Kbyte SRAM z EEPROM Operation
- High reliable CMOS EEPROM technology
- Page mode for erase or programming up to 1~64 bytes
- Protected one time programmable block (64 bytes)
- 300,000 write/erase endurance cycles
- 10 years data retention (min.) z Peripherals
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- UART supporting ISO standard protocols T=0 and T=1 Two 16 bit timers True random number generator CRC module Interrupt controller for I/O interface and...