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MN101C62F - MN101 Series microcontroller

This page provides the datasheet information for the MN101C62F, a member of the MN101C28 MN101 Series microcontroller family.

Datasheet Summary

Features

  • q Efficiency of C-based ROM code: Assembler rate 1 or less q High-speed instruction processing: 63 ns (32 MHz) q Linear address space: 1 MB q Identical architecture for 32- and 16-bit microcomputers q Option functions Hardware task switching (Max. 4 task) 16-bit multiplication ROM collection s.

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Datasheet Details

Part number MN101C62F
Manufacturer Matsushita Electric
File Size 2.57 MB
Description MN101 Series microcontroller
Datasheet download datasheet MN101C62F Datasheet
Additional preview pages of the MN101C62F datasheet.
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Full PDF Text Transcription

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Sheet4U.com AM1 (MN101) Series AM1 (MN101) Series The AM1 Series of 8-bit microcomputers is the realization of developments in C programming. Because of the 8-bit architecture, which allows half-byte instruction sets and offers other advantages, assembler ROM code size can be reduced. They are compact and consume little power, but feature a shortest instruction processing time of 63 ns (5 V). They can be used in a wide variety of applications where cost performance is a demand. Features q Efficiency of C-based ROM code: Assembler rate 1 or less q High-speed instruction processing: 63 ns (32 MHz) q Linear address space: 1 MB q Identical architecture for 32- and 16-bit microcomputers q Option functions Hardware task switching (Max.
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