MAX1426 Datasheet | Maxim Integrated

Description The MAX1426 10-bit, monolithic analog-to-digital converter (ADC) is capable of a 10Msps sampling rate. This device features an internal track-and-hold (T/H) amplifier for excellent dynamic performance; at the same time, it minimizes the number of external ponents. Low input capacitance of only 8p F minimizes input drive requirements. A wide input bandwidth (up to 150MHz) makes this device suitable for digital RF/IF downconverter applications employing undersampling techniques. The MAX1426 employs a differential pipelined architecture with a wideband T/H amplifier to maximize throughput while limiting power consumption to only 156m W. The MAX1426 generates an internal +2.5V reference that supplies three additional reference voltages (+3.25V, +2.25V, and +1.25V). These reference voltages provide a differential input range of +2V to -2V. The analog inputs are biased internally to correct the DC level, eliminating the need for external biasing on AC-coupled applications. A separate +3V digital logic supply input allows for separation of digital and analog circuitry. The output data is in two’s plement format. The MAX1426 is available in the space-saving 28-pin SSOP package. For a pin-patible version at a higher data rate, refer to the MAX1424 or MAX1425 Features o Differential Inputs for High mon-Mode Noise Rejection o 61d B Signal-to-Noise Ratio (at f IN = 2MHz) o Internal +2.5V Reference o 150MHz Input Bandwidth o Wide ±2V Input Range o Low Power Consumption: 156m W o Separate Digital Supply Input for 3V Logic patibility o Single +5V Operation Possible Ordering Information PART MAX1426CAI MAX1426EAI TEMP. RANGE 0°C to +70°C -40°C to +85°C PIN-PACKAGE 28 SSOP 28 SSOP Applications Medical Ultrasound Imaging CCD Pixel Processing IR Focal Plane Array Radar IF and Baseband Digitization Set-Top Boxes TOP VIEW AGND 1 AVDD 2 REFP 3 REFIN 4 Pin Configuration 28 D0 27 D1 26 D2 25 D3 24 D4 Functional Diagram CLK INTERFACE INP T/H INN REF SYSTEM + BIAS...