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MAX2101 - 6-Bit Quadrature Digitizer

Description

The MAX2101 6-bit quadrature digitizer combines quadrature demodulation with analog-to-digital conversion on a single bipolar silicon die.

This unique RF-to-Bits TM function bridges the gap between existing RF downconverters and CMOS digital signal processors (DSPs).

Features

  • o ADCs Provide Greater than 5.5 Effective Bits at fS = 60Msps, fIN = 15MHz o Fully Integrated Lowpass Filters with Externally Variable Bandwidth (10MHz to 30MHz) o 40dB Dynamic Range o Integrated VCO and Quadrature Generation Network for I/Q Demodulation o Divide-by-16 Prescaler for Oscillator PLL o Programmable Counter for Variable Sample Rates o Signal-Detection Function o Selectable Offset Binary or Twos-Complement Output Data Format o Automatic Baseband Offset Cancellation MAX2101 ________.

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Full PDF Text Transcription

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19-0298; Rev 4; 5/96 KIT ATION EVALU ABLE AVAIL 6-Bit Quadrature Digitizer _______________General Description The MAX2101 6-bit quadrature digitizer combines quadrature demodulation with analog-to-digital conversion on a single bipolar silicon die. This unique RF-to-Bits TM function bridges the gap between existing RF downconverters and CMOS digital signal processors (DSPs). The MAX2101’s simple receiver subsystem is designed for digital communications systems such as those used in DBS, TVRO, WLAN, and other applications. The MAX2101 accepts input signals from 400MHz to 700MHz and applies adjustable gain, providing at least 40dB of dynamic range. Each baseband is filtered by an on-chip, 5th-order Butterworth lowpass filter, or the user can select an external filter path.
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