Description
PIN PDIP PowerCap
NAME
1 32
A14
2 30
A12
3 25
A7
4 24
A6
5 23
A5
6 22
A4
7 21
A3
8 20
A2
9 19
A1
10 18
A0
11 16
DQ0
12 15
DQ1
13 14
DQ2
14 17
GND
15 13
DQ3
16 12
DQ4
17 11
DQ5
18 10
DQ6
19 9
DQ7
20 8
CE
21 28
A10
22 7
OE
23 29
A11
24 27
A9
25 26
A8
26 31 27 6
A13 WE
28 5 -4
VCC RST
- 1-3,33,34
NC
- X1, X2,
VBAT
Address Input
FUNCTION
Data Input/Output
Ground
Data Input/Output
Active Low Chip-Enable Input Address Input Active Low Outp
Features
- Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit and Lithium Energy Source.
- Clock Registers are Accessed Identically to the Static RAM. These Registers are Resident in the Eight Top RAM Locations.
- Totally Nonvolatile with Over 10 Years of Operation in the Absence of Power.
- BCD-Coded Year, Month, Date, Day, Hours, Minutes, and Seconds with Leap Year Compensation Valid Up to 2100.
- Power-Fail Write Protection Allows for ±10% VCC Power Supply Tolera.