DS28E01-100 Datasheet | Maxim Integrated

ABRIDGED DATA SHEET DS28E01-100 1Kb Protected 1-Wire EEPROM with SHA-1 Engine General Description The DS28E01-100 bines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E01-100 has its own guaranteed unique 64-bit ROM registration number that is factory lasered into the chip. The DS28E01100 municates over the single-contact 1-Wire® bus. The munication follows the standard 1-Wire protocol with the registration number acting as the node address in the case of a multidevice 1-Wire network. Applications Printer Cartridge Configuration and Monitoring Medical Sensor Authentication and Calibration System Intellectual Property Protection Typical Operating Circuit VCC μC RPUP IO DS28E01-100 Pin Configurations appear at end of data sheet. Features - 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits - On-Chip 512-Bit SHA-1 Engine to pute 160Bit Message Authentication Codes (MACs) and to Generate Secrets - Write Access Requires Knowledge of the Secret and the Capability of puting and Transmitting a 160-Bit MAC as Authorization - User-Programmable Page Write Protection for Page 0, Page 3, or All Four Pages Together - User-Programmable OTP EPROM Emulation Mode for Page 1 (“Write to 0”) - municates to Host with a Single Digital Signal at 15.3kbps or 90.9kbps Using 1-Wire Protocol - Switchpoint Hysteresis and Filtering to Optimize Performance in the Presence of Noise - Reads and Writes Over 2.8V to 5.25V Voltage Range from -40°C to +85°C - 6-Lead TSOC and TDFN or 2-Lead TO-92 and SFN Packages Ordering Information PART DS28E01-100+ DS28E01P-100+ DS28E01P-100+T DS28E01G-100+T&R DS2...