DS28E01-100 Datasheet - Maxim Integrated

1Kb Protected 1-Wire EEPROM

DS28E01-100 Features

* 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits

* On-Chip 512-Bit SHA-1 Engine to Compute 160Bit Message Authentication Codes (MACs) and to Generate Secrets

* Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmitting a

DS28E01-100 General Description

The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory page.

DS28E01-100 Datasheet (328.28 KB)