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Maxim Integrated Semiconductor Electronic Components Datasheet

MAX5318 Datasheet

18-Bit High-Accuracy Voltage Output DAC

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EVALUATION KIT AVAILABLE
MAX5318
18-Bit, High-Accuracy Voltage Output DAC with
Digital Gain, Offset Control, and SPI Interface
General Description
The MAX5318 is a high-accuracy, 18-bit, serial SPI input,
buffered voltage output digital-to-analog converter (DAC)
in a 4.4mm x 7.8mm, 24-lead TSSOP package. The
device features Q2 LSB INL (max) accuracy and a Q1
LSB DNL (max) accuracy over the full temperature range
of -40NC to +105NC.
The DAC voltage output is buffered resulting in a fast
settling time of 3Fs and a low offset and gain drift of
Q0.5ppm/NC of FSR (typ). The force-sense output (OUT)
maintains accuracy while driving loads with long lead
lengths. Additionally, a separate AVSS supply, allows the
output amplifier to go to 0V (GND) while maintaining full
linearity performance.
The MAX5318 includes user-programmable digital gain
and offset correction to enable easy system calibration.
At power-up, the device resets its outputs to zero or mid-
scale. The wide 2.7V to 5.5V supply voltage range and
integrated low-drift, low-noise reference buffer amplifier
make for ease of use.
The MAX5318 features a 50MHz 3-wire SPI interface. The
MAX5318 is available in a 24-lead TSSOP package and
operates over the -40NC to +105NC temperature range.
Benefits and Features
S Ideal for ATE and High-Precision Instruments
INL Accuracy Guaranteed with ±2 LSB (Max)
Over Temperature
S Fast Settling Time (3µs) with 10kI || 100pF Load
S Safe Power-Up-Reset to Zero or Midscale DAC
Output (Pin-Selectable)
Predetermined Output Device State in Power-Up
and Reset in System Design
S Negative Supply (AVSS) Option Allows Full INL
and DNL Performance to 0V
S SPI Interface Compatible with 1.8V to 5.5V Logic
S High Integration Reduces Development Time and
PCB Area
Buffered Voltage Output Directly Drives
2kI Load Rail-to-Rail
Integrated Reference Buffer
No External Amplifiers Required
S Small 4.4mm x 7.8mm, 24-Pin TSSOP Package
Ordering Information and Typical Operating Circuit appear
at end of data sheet.
Test and Measurement
Equipment
Automatic Test Equipment
Gain and Offset
Adjustment
Data-Acquisition Systems
Process Control and
Servo Loops
Applications
Programmable Voltage
and Current Sources
Automatic Tuning and
Calibration
Communication Systems
Medical Imaging
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/MAX5318.related.
Functional Diagram
VDDIO
24
MAX5318
LDAC 5
CS 9
SCLK 8
SPI
DIN 7
DOUT 6
SPI
INTERFACE
READY 2
DIGITAL
OFFSET
DIGITAL
GAIN
DIN
BUSY 4
RST 1
M/Z 3
TC/SB 10
PD 11
CONTROL
LOGIC
23
DGND
POWER-ON
RESET
SHUTDOWN
REF
18
BUFFER
AVDD1
14
AVDD2
21
17 REFO
7.8kI
INPUT/DAC
REGISTER
18-BIT 7.8kI
DAC
7.8kI 16 RFB
OUTPUT 15 OUT
BUFFER
7.8kI
22
BYPASS
13
AGND
19
AGND_S
20
AGND_F
12
AVSS
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6465; Rev 0; 9/12


Maxim Integrated Semiconductor Electronic Components Datasheet

MAX5318 Datasheet

18-Bit High-Accuracy Voltage Output DAC

No Preview Available !

MAX5318
18-Bit, High-Accuracy Voltage Output DAC with
Digital Gain, Offset Control, and SPI Interface
ABSOLUTE MAXIMUM RATINGS
AGND to DGND....................................................-0.3V to +0.3V
AGND_F, AGND_S to AGND................................-0.3V to +0.3V
AGND_F, AGND_S to DGND................................-0.3V to +0.3V
AVDD to AGND........................................................-0.3V to +6V
AVDD to REF............................................................-0.3V to +6V
AVSS to AGND.........................................................-2V to +0.3V
VDDIO to DGND........................................................-0.3V to +6V
BYPASS to DGND........................................ -0.3V to the lower of
(VAVDD_ or VDDIO + 0.3V) and +4.5V
OUT, REFO, RFB to AGND.......................... -0.3V to the lower of
(VAVDD + 0.3V) and +6V
REF to AGND....................-0.3V to the lower of VAVDD and +6V
SCLK, DIN, CS, BUSY, LDAC, READY,
M/Z, TC/SB, RST, PD, DOUT to DGND........ -0.3V to the lower of
(VDDIO + 0.3V) and +6V
Continuous Power Dissipation (TA = +70NC)
TSSOP (derate 13.9mW/NC above +70NC).............1111.1mW
Operating Temperature Range......................... -40NC to +105NC
Maximum Junction Temperature......................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TSSOP
Junction-to-Case Thermal Resistance (qJA)................13°C/W
Junction-to-Ambient Thermal Resistance (qJA)...........72°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VAVDD = VDDIO = 4.5V to 5.5V, VAVSS = -1.25V, VAGND = VDGND = VAGND_F = VAGND_S = 0V, VREF = 4.096V, TC/SB =
PD = LDAC = M/Z = DGND, RST = VDDIO, CREFO = 100pF, CL = 100pF, RL = 10kω, CBYPASS = 1µF, TA = -40°C to +105°C, unless
otherwise noted. Typical values are at TA = +25°C.) (GAIN = 0x3FFFF and OFFSET = 0x00000.)(Note 2)
PARAMETER
STATIC PERFORMANCE
Resolution
SYMBOL
N
CONDITIONS
MIN TYP MAX UNITS
18 Bits
Integral Nonlinearity (Note 3)
Differential Nonlinearity (Note 3)
Zero Code Error
Zero Code Error Drift (Note 4)
Gain Error
Gain Error Temperature
Coefficient (Note 4)
INL
DNL
OE
GE
TCGE
DIN = 0x00000 to 0x3FFFF
(binary mode), DIN = 0x20000 to 0x1FFFF
(two’s complement mode)
DIN = 0x01900 to 0x3FFFF (binary
mode), DIN = 0x21900 to 0x1FFFF (two’s
complement mode), VAVSS = 0V
DIN = 0, TA = +25NC
DIN = 0, TA = -40NC to +105NC
DIN = 0
TA = +25NC
TA = -40NC to +105NC
-2
-1
-48
-1.6
-16
-2.5
Q0.5
+2
Q0.275
Q4
Q14
Q0.10
Q1
Q27
Q0.10
+1
+48
+1.6
+16
+2.5
LSB
LSB
LSB
ppm/NC
LSB
ppm/NC
of FSR
Output Voltage Range
No load
0
VAVDD -
0.1
V
Maxim Integrated
  2


Part Number MAX5318
Description 18-Bit High-Accuracy Voltage Output DAC
Maker Maxim Integrated
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MAX5318 Datasheet PDF






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