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DS26504 - T1/E1/J1/64KCC BITS Element

Description

Note: Some revisions of this device may incorporate deviations from published specifications known as errata.

Multiple revisions of any device may be simultaneously available through various sales channels.

For information about device errata, click here: www.maxim-ic.com/errata.

Features

  • Fast Transmitter Output Disable through Device.
  • Accepts 8kHz and 19.44MHz References in Pin for Protection Switching Addition to T1, E1, and 64kHz Composite Clock.
  • IEEE 1149.1 JTAG Boundary Scan.
  • GR378 Composite Clock Compliant.
  • 3.3V Supply with 5V Tolerant Inputs and.
  • G.703 2048kHz Synchronization Interface Outputs Compliant.
  • Pin and Software Compatible with the DS26502.
  • G.703 64kHz Option A & B Centralized Clock and DS26503 Synchronization Interface Com.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS26504 T1/E1/J1/64KCC BITS Element www.maxim-ic.com Transmit and Receive T1 BOC SSM Messages with Receive Message Change of State and The DS26504 is a building-integrated timing-supply Validation Indication (BITS) clock-recovery element. It also functions as a § Transmit and Receive E1 Sa(n) Bit SSM basic T1/E1 transceiver. The receiver portion can Messages with Receive Message Change of State recover a clock from T1, E1, 64kHz composite clock Indication (64KCC), and 6312kHz synchronization timing § Crystal-Less Jitter Attenuator with Bypass Mode interfaces. In T1 and E1 modes, the Synchronization for T1 and E1 Operation Status Message (SSM) can also be recovered.
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