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MAX9242 - (MAX9242 - MAX9246) 21-Bit Deserializers

Description

The MAX9242/MAX9244/MAX9246 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs.

A separate parallel-rate LVDS clock provides the timing for deserialization.

Features

  • Programmable ±4%, ±2%, or OFF Spread-Spectrum Output for Reduced EMI.
  • Programmable DC-Balanced or Non-DC-Balanced Modes.
  • DC Balance Allows AC-Coupling for Wider Input Common-Mode Voltage Range.
  • Spread Spectrum Operates in DC-Balanced or Non-DC-Balanced Mode.
  • π / 4 Deskew by Oversampling (MAX9242/MAX9244).
  • 16MHz-to-34MHz (DC-Balanced) and 20MHz-to40MHz (Non-DC-Balanced) Operation (MAX9242/MAX9244).
  • 6MHz-to-18MHz (DC-Balanced) and 8MH.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 19-3954; Rev 0; 1/06 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance General Description The MAX9242/MAX9244/MAX9246 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A separate parallel-rate LVDS clock provides the timing for deserialization. The MAX9242/ MAX9244/MAX9246 feature spread-spectrum capability, allowing the output data and clock frequency to spread over a specified range to reduce EMI. The single-ended data and clock outputs are programmable for a frequency spread of ±2%, ±4%, or no spread. The spread-spectrum function is also available when the MAX9242/MAX9244/ MAX9246 operate in non-DC-balanced mode.
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