Description
64KB Embedded Zero-Wait-State SRAM
Vectored Interrupt Controller
External Bus Interface Dual External Bus Architecture (Primary and Secondary) 24-Bit Address, 16-Bit Data Synchronous Flash SDRAM in 16MB to 512MB Configurations
Power Management Unit 14MHz to 40
Features
- for PCI Compliance Voltage and Temperature Sensors Sensors for Tamper Switches and Wire Mesh Clock Frequency and Glitch Protection Battery-Backed Secure Memory with Active Zeroization.
- Embedded Boot ROM 32-Bit Unique ID Number NIST 800-22-Compliant Random-Number Generator FIPS 180-2-Compliant SHA-1 Hash Generator Two ISO 7816 Smart Card UARTs 3-Track Magnetic Stripe Re.
ZA9L1 Datasheet
