MG87FEL52 Description
.........................................................................................................................................8 Pin Description.................................................................................................................................................
MG87FEL52 Key Features
- 80C51 Central Processing Unit
- 8KB On-Chip program memory for program ROM, ISP ROM & IAP zone
- ISP capability; optional 0.5K/1KB/1.5K~3.5KB ISP memory shared with 8KB flash memory
- IAP capability; program controlled IAP memory size shared with 8KB flash memory
- On-Chip 256 bytes scratch-pad RAM. Also, the MCU can address up to 64K bytes external memory
- MOVC-disabling, encrypting, and locking flash memory realize security mechanism
- Three 16-bits timer/counter, Timer2 is an up/down counter with programmable clock output on P1.0
- Eight sources, four-level-priority interrupt capability
- Enhanced UART, provides frame-error detection and hardware address-recognition
- Dual DPTR for fast-accessing of data memory