Download PL102-10 Datasheet PDF
PL102-10 page 2
Page 2
PL102-10 page 3
Page 3

PL102-10 Description

The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOP or 6-pin SOT23 package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL.