PL102-10 - Low Skew Output Buffer

Description

The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOP or 6-pin SOT23 package.

It has two outputs that are synchronized with the input.

Micrel

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Datasheet Details

Part number	PL102-10
Manufacturer	Micrel
File Size	250.40 KB
Description	Low Skew Output Buffer
Datasheet	PL102-10 Datasheet
Additional preview pages of the PL102-10 datasheet.

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Full PDF Text Transcription

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FE AT UR E S  Frequency Range: − 15 to 170MHz @ 3.3V − 15 to 145MHz @ 2.5V  Internal Phase Locked Loop Allows Spread Spectrum Modulation on Reference Clock to Pass to Outputs.  Zero Input to Output Delay  Less Than 700ps Device to Device Skew  Less Than 200ps Skew Between Outputs  Less Than 100ps Cycle to Cycle Jitter  2.5V or 3.3V Power Supply  Available in 8-Pin SOP or 6-pin SOT GREEN/ RoHS Compliant Packages PL102-10 Low Skew Output Buffer PIN CONFIGURATION REFIN 1 8 CLKOUT GND 2 7 DNC CLK1 3 6 DNC CLK2 4 5 VDD SOP-8L CLK1 1 6 CLK2 GND 2 5 VDD REFIN 3 4 CLKOUT SOT23-6L DESCRIPTION The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOP or 6-pin SOT23 package.

Published: May 13, 2015 |