SY100E143 register equivalent, 9-bit hold register.
s 700MHz min. operating frequency s Extended 100E VEE range of
–4.2V to
–5.5V s 9 bits wide for byte-parity applications s Asynchronous Ma.
s Asynchronous Master Reset s Dual clocks s Fully compatible with industry standard 10KH,
100K ECL levels s Internal 75k.
The SY10/100E143 are high-speed 9-bit hold registers designed for use in new, high-performance ECL systems. The E143 can hold current data or load new data. The nine inputs, D0-D8, accept parallel input data.
The SEL (Select) control pin serves to de.
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