Download SY89535L Datasheet PDF
SY89535L page 2
Page 2
SY89535L page 3
Page 3

SY89535L Key Features

  • 9 differential output pairs @BankB (LVPECL/LVDS)
  • 2 differential output pairs @BankA (LVPECL)
  • 2 differential output pairs @BankC (LVPECL)

SY89535L Description

The SY89534L and SY89535L programmable clock synthesizers are a 3.3V, high-frequency, precision PLL-based family optimized for multi-frequency, large clock-tree applications that require the highest precision. These devices integrate the following blocks into a single monolithic IC: PLL (Phase-Lock-Loop)-based synthesizer Fanout buffer Clock generator (divider) Logic translation (LVPECL, LVDS) The SY89534L and...