48L256 - 256-Kbit SPI Serial EERAM

Description

The Microchip Technology Inc.

48L256 serial EERAM has an SRAM memory core with hidden EEPROM backup.

The device can be treated by the user as a full symmetrical read/write SRAM.

Features

Unlimited Reads/Unlimited Writes: - Standard serial SRAM protocol - Symmetrical timing for reads and writes.
SRAM Array: - 32,768 x 8 bit.
High-Speed SPI Interface: - Up to 66 MHz - Schmitt Trigger inputs for noise suppression.
Low-Power CMOS Technology: - Active current: 5 mA (maximum) - Standby current: 300 μA (at 85°C maximum) - Hibernate current: 3 μA (at 85°C maximum) Hidden EEPROM Backup Features.
Cell-Based Nonvolatile Backup: - Mirrors SRAM a.

Microchip

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Datasheet Details

Part number	48L256
Manufacturer	Microchip
File Size	514.37 KB
Description	256-Kbit SPI Serial EERAM
Datasheet	48L256 Datasheet
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256-Kbit SPI Serial EERAM 48L256 Serial SRAM Features • Unlimited Reads/Unlimited Writes: - Standard serial SRAM protocol - Symmetrical timing for reads and writes • SRAM Array: - 32,768 x 8 bit • High-Speed SPI Interface: - Up to 66 MHz - Schmitt Trigger inputs for noise suppression • Low-Power CMOS Technology: - Active current: 5 mA (maximum) - Standby current: 300 μA (at 85°C maximum) - Hibernate current: 3 μA (at 85°C maximum) Hidden EEPROM Backup Features • Cell-Based Nonvolatile Backup: - Mirrors SRAM array cell-for-cell - Transfers all data to/from SRAM cells in parallel (all cells at same time) • Invisible-to-User Data Transfers: - VCC level monitored inside device - SRAM automatically saved on power disrupt - SRAM automatically restored on VCC return • 100,000 Backups Minimum (a

Published: Mar 17, 2020 |