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  Microchip Technology Semiconductor Electronic Components Datasheet  

AN555 Datasheet

Software Implementation of Asynchronous Serial I/O

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M
AN555
Software Implementation of Asynchronous Serial I/O
Author:
Code Update:
Amar Palacherla
Microchip Technology
Scott Fink
Microchip Technology Inc.
INTRODUCTION
PIC16CXXX microcontrollers from Microchip Technology,
Inc., high-performance, EPROM-based 8-bit microcon-
trollers. Some of the members of this series (like the
PIC16C71 and PIC16C84) do not have an on-chip hard-
ware asynchronous serial port. This application note
describes the interrupt driven software implementation of
Asynchronous Serial I/O (Half Duplex RS-232 Communi-
cations) using PIC16CXXX microcontrollers. These
microcontrollers can operate at very high speeds with a
minimum of 250 ns cycle time (with input clock frequency
of 16 MHz). To test the RS-232 routines, a simple Digital
Voltmeter (DVM)/Analog Data Acquisition System has
been implemented using a PIC16C71, in which, upon
reception of a command from host (IBM PC-AT®), an 8-bit
value of the selected A/D channel is transmitted back to
the host.
IMPLEMENTATION
A half duplex, interrupt driven, software implementation of
RS-232 communications, using a PIC16C71, is described
in detail below. The transmit pin used in the example code
is RB7 and the receive pin is connected to the RA4/T0CKI
pin (Figure 2). Of course these pins are connected with
appropriate voltage translation to/from RS-232/CMOS
levels. Schematics describe the voltage translation in the
hardware section of this application note.
Transmit Mode
Transmit mode is quite straight-forward to implement in
software using interrupts. Once input clock frequency
and baud rate are known, the number of clock cycles
per bit can be computed. The on-chip Timer0 timer with
its prescaler can be used to generate an interrupt on
TMR0 overflow. This TMR0 overflow interrupt can be
used as timing to send each bit. The Input clock fre-
quency (_ClkIn) and Baud Rate (_BaudRate) are
programmable by the user and the TMR0 time-out
value (the period for each bit) is computed at assembly
time. Whether the prescaler must be assigned to
Timer0 or not is also determined at assembly time. This
computation is done in the header file rs232.h. Note
that very high speed transmissions can be obtained if
transmission is done with “software delays” instead of
being “every interrupt” driven, however, the processor
will be totally dedicated to this job.
Transmission of a byte is performed by calling the
PutChar function and the data byte in the TxReg is
transmitted out. Before calling this function (PutChar),
the data must be loaded into TxReg and ensure the
serial port is free. The serial port is free when both the
_txmtProgress and the _rcvOver bits are cleared (see
description of these bits in the Serial Status/Control
Reg table given later).
Summary of PutChar function:
1. Make sure _txmtProgress & _rcvOver bits are
cleared
2. Load TxReg with data to be transmitted
3. Call PutChar function
Receive Mode
The reception mode implementation is slightly different
from the transmit mode. Unlike the transmit pin (TX in
the example code is RB7, but could be any I/O pin), the
receive pin (RX) must be connected to pin RA4/T0CKI.
This is because, in reception, the Start Bit, which is
asynchronous in nature, must be detected. To detect
the Start bit, when put in Reception mode, the Timer0
module is configured to Counter mode. The OPTION
register is configured so the Timer0 module is put in
Counter mode (increment on external clock on
RA4/T0CKI Pin) and set to increment on the falling
edge of pin RA4/T0CKI with no prescaler assigned.
After this configuration setup, TMR0 (File Reg 1) is
loaded with 0xFF. A falling edge on the T0CKI pin
makes TMR0 roll over from 0xFF to 0x00, thus gener-
ating an interrupt indicating a Start Bit. The RA4/T0CKI
pin is sampled again to make sure the transition on
TMR0 is not a glitch. Once the start bit has been
detected, the Timer0 module is reconfigured to incre-
ment on internal clock and the prescaler is assigned to
it depending on input master clock frequency and the
baud rate (configured same way as the transmission
mode).
The software serial port is put in reception mode when
a call is made to function GetChar. Before calling this
function make sure the serial port is free (i.e.,
_txmtProgress and _rcvOver status bits must be '0').
On completion of a reception of a byte, the data is
stored in RxReg and the _rcvOver bit is cleared.
Summary of GetChar function:
1. Make sure _txmtProgress & _rcvOver bits are
cleared.
2. Call GetChar function.
3. The received Byte is in TxReg after the _rcvOver
bit is cleared.
IBM PC-AT is a registered trademark of International Business Machines Corp.
© 1997 Microchip Technology Inc.
DS00555C-page 1


  Microchip Technology Semiconductor Electronic Components Datasheet  

AN555 Datasheet

Software Implementation of Asynchronous Serial I/O

No Preview Available !

AN555
Parity Generation
Parity can be enabled at assembly time by setting the
“_PARITY_ENABLE” flag to TRUE. If enabled, parity
can be configured to either EVEN or ODD parity. In
transmission mode, if parity is enabled, the parity bit is
computed and transmitted as the ninth bit. On
reception, the parity is computed on the received byte
and compared to the ninth bit received. If a match does
not occur the parity error bit is set in the RS-232
Status/Control Register (_ParityErr bit of SerialStatus
reg). The parity bit is computed using the algorithm
shown in Figure 1. This algorithm is highly efficient
using the PIC16CXXX’s SWAPF and XORWF instruc-
tions (with ability to have the destination as either the
file register itself or the W register) and the sub-routine
(called GenParity) is in file txmtr.asm.
FIGURE 1: AN EFFICIENT PARITY GENERATION SCHEME IN SOFTWARE
Data Byte
Bits <7:4> Bits <3:0>
XOR
<3:2> <1:0>
XOR
10
XOR
Parity Bit
Assembly Time Options
The firmware is written as a general purpose routine
and the user must specify the parameters shown in
Table 1 before assembling the program. The Sta-
tus/Control register is described in Table 2.
TABLE 1: LIST OF ASSEMBLY TIME OPTIONS
_ClkIn
_BaudRate
_DataBits
_StopBits
_PARITY_ENABLE
_ODD_PARITY
_USE_RTSCTS
Input clock frequency of the processor.
Desired Baud Rate. Any valid value can be used. The highest baud rate achievable
depends on input clock frequency. 600 to 4800 Baud was tested using a 4 MHz Input
Clock. 600 to 19200 Baud was tested using a 10 MHz Input Clock. Higher rates can be
obtained using higher input clock frequencies.
Once the _BaudRate & _ClkIn are specified, the program automatically selects all the
appropriate timings.
Can specify 1 to 8 data bits.
Limited to 1 Stop Bit. Must be set.
Parity Enable Flag. Configure it to TRUE or FALSE. If PARITY is used, then configure it to
TRUE, else FALSE. See “_ODD_PARITY” flag description below.
Configure it to TRUE or FALSE. If TRUE, then ODD PARITY is used, else EVEN Parity
Scheme is used.
This Flag is ignored if _PARITY_ENABLE is configured to FALSE.
RTS & CTS Hardware handshaking signals. If configured to FALSE, no hardware
handshaking is used. If configured to TRUE, RTS & CTS use up 2 I/O Pins of PORTB.
DS00555C-page 2
© 1997 Microchip Technology Inc.


Part Number AN555
Description Software Implementation of Asynchronous Serial I/O
Maker Microchip
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