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KSZ8081MNX - 10BASE-T/100BASE-TX Physical Layer Transceiver

General Description

and Configuration 5 3.0 Functional Description 15 4.0 Register Descriptions 34 5.0 Operational Characteristics 45 6.0 Electrical Characteristics 46 7.0 Timing Diagrams 48 8.0 Package Outline 60 Appendix A: Data Sheet Revision History

Key Features

  • Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver.
  • MII interface support (KSZ8081MNX).
  • RMII v1.2 Interface support with a 50 MHz reference clock output to MAC, and an option to input a 50 MHz reference clock (KSZ8081RNB).
  • Back-to-back mode support for a 100 Mbps  copper repeater.
  • MDC/MDIO management interface for PHY  register configuration.
  • Programmable interrupt output.
  • LED outputs for link, activity, and.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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KSZ8081MNX/RNB 10BASE-T/100BASE-TX Physical Layer Transceiver Features • Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver • MII interface support (KSZ8081MNX) • RMII v1.