KSZ8081MNX - 10BASE-T/100BASE-TX Physical Layer Transceiver

Product Overview

Microchip

Datasheet Details

Part number	KSZ8081MNX
Manufacturer	Microchip
File Size	3.50 MB
Description	10BASE-T/100BASE-TX Physical Layer Transceiver
Datasheet	KSZ8081MNX Datasheet
Additional preview pages of the KSZ8081MNX datasheet.

Product details

Description

and Configuration 5 3.0 Functional Description 15 4.0 Register Descriptions 34 5.0 Operational Characteristics 45 6.0 Electrical Characteristics 46 7.0 Timing Diagrams 48 8.0 Package Outline 60 Appendix A: Data Sheet Revision History

Features

Single-chip 10Base-T/100Base-TX IEEE 802.3 compliant Ethernet transceiver.
MII interface support (KSZ8081MNX).
RMII v1.2 Interface support with a 50 MHz reference clock output to MAC, and an option to input a 50 MHz reference clock (KSZ8081RNB).
Back-to-back mode support for a 100 Mbps  copper repeater.
MDC/MDIO management interface for PHY  register configuration.
Programmable interrupt output.
LED outputs for link, activity, and.

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Other Datasheets by Microchip

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Published: Oct 3, 2023 |