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  Microchip Technology Semiconductor Electronic Components Datasheet  

KSZ9567R Datasheet

7-Port Gigabit Ethernet Switch

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KSZ9567R
7-Port Gigabit Ethernet Switch
with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
Highlights
• Non-blocking wire-speed Ethernet switching fabric
• Full-featured forwarding and filtering control, includ-
ing Access Control List (ACL) filtering
• Full VLAN and QoS support
• Five ports with integrated 10/100/1000BASE-T PHY
transceivers
• Two ports with 10/100/1000 Ethernet MACs and con-
figurable RGMII/MII/RMII interfaces
• IEEE 1588v2 Precision Time Protocol (PTP) support
• IEEE 802.1AS/Qav Audio Video Bridging (AVB)
• IEEE 802.1X access control support
• EtherGreen™ power management features,
including low power standby
• Flexible management interface options: SPI, I2C,
MIIM, and in-band management via any port
• Industrial temperature range support
• 128-pin TQFP-EP (14 x 14mm) RoHS compliant pkg
Target Applications
• Industrial Ethernet (Profinet, MODBUS, Ethernet/IP)
• Real-time Ethernet networks
• IEC 61850 networks w/ power substation automation
• Industrial control/automation switches
• Networked measurement and control systems
• Test and measurement equipment
Features
• Switch Management Capabilities
- 10/100/1000Mbps Ethernet switch basic functions:
frame buffer management, address look-up table,
queue management, MIB counters
- Non-blocking store-and-forward switch fabric assures
fast packet delivery by utilizing 4096 entry forwarding
table with 256kByte frame buffer
- Jumbo packet support up to 9000 bytes
- Port mirroring/monitoring/sniffing:
ingress and/or egress traffic to any port
- Rapid spanning tree protocol (RSTP) support for topol-
ogy management and ring/linear recovery
- Multiple spanning tree protocol (MSTP) support
• Two Configurable External MAC Ports
- Reduced Gigabit Media Independent Interface
(RGMII) v2.0
- Reduced Media Independent Interface (RMII) v1.2
with 50MHz reference clock input/output option
- Media Independent Interface (MII) in PHY/MAC mode
• Five Integrated PHY Ports
- 1000BASE-T/100BASE-TX/10BASE-Te IEEE 802.3
- Fast Link-up option significantly reduces link-up time
- Auto-negotiation and Auto-MDI/MDI-X support
- On-chip termination resistors and internal biasing for
differential pairs to reduce power
- LinkMD® cable diagnostic capabilities for determining
cable opens, shorts, and length
• Advanced Switch Capabilities
- IEEE 802.1Q VLAN support for 128 active VLAN
groups and the full range of 4096 VLAN IDs
- IEEE 802.1p/Q tag insertion/removal on per port basis
- VLAN ID on per port or VLAN basis
- IEEE 802.3x full-duplex flow control and half-duplex
back pressure collision control
- IEEE 802.1X access control
(Port-based and MAC address based)
- IGMP v1/v2/v3 snooping for multicast packet filtering
- IPv6 multicast listener discovery (MLD) snooping
- IPv4/IPv6 QoS support, QoS/CoS packet prioritization
- 802.1p QoS packet classification with 4 priority queues
- Programmable rate limiting at ingress/egress ports
• IEEE 1588v2 PTP and Clock Synchronization
- Transparent Clock (TC) with auto correction update
- Master and slave Ordinary Clock (OC) support
- End-to-end (E2E) or peer-to-peer (P2P)
- PTP multicast and unicast message support
- PTP message transport over IPv4/v6 and IEEE 802.3
- IEEE 1588v2 PTP packet filtering
- Synchronous Ethernet support via recovered clock
• Audio Video Bridging (AVB)
- Compliant with IEEE 802.1BA/AS/Qat/Qav standards
- Priority queuing, Low latency cut-through mode
- gPTP time synchronization, credit-based traffic shaper
- Time aware traffic scheduler per port
• Comprehensive Configuration Registers Access
- High-speed 4-wire SPI (up to 50MHz), I2C interfaces
provide access to all internal registers
- MII Management (MIIM, MDC/MDIO 2-wire) Interface
provides access to all PHY registers
- In-band management via any of the data ports
- I/O pin strapping facility to set certain register bits from
I/O pins at reset time
• Power Management
- Energy detect power-down mode on cable disconnect
- Dynamic clock tree control
- Unused ports can be individually powered down
- Full-chip software power-down
- Wake-on-LAN (WoL) standby power mode with PME
interrupt output for system wake upon triggered events
2017 Microchip Technology Inc.
DS00002329B-page 1


  Microchip Technology Semiconductor Electronic Components Datasheet  

KSZ9567R Datasheet

7-Port Gigabit Ethernet Switch

No Preview Available !

KSZ9567R
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
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To obtain the most up-to-date version of this documentation, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
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DS00002329B-page 2
2017 Microchip Technology Inc.


Part Number KSZ9567R
Description 7-Port Gigabit Ethernet Switch
Maker Microchip
Total Page 3 Pages
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