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PIC16F13145 - Microcontrollers

This page provides the datasheet information for the PIC16F13145, a member of the PIC16F13113 Microcontrollers family.

Datasheet Summary

Features

  • C Compiler Optimized RISC Architecture.
  • Operating Speed:.
  • DC-32 MHz clock input.
  • 125 ns minimum instruction time.
  • 16-Level Deep Hardware Stack.
  • Low-Current Power-on Reset (POR).
  • Configurable Power-up Timer (PWRT).
  • Brown-out Reset (BOR).
  • Low-Power Brown-out Reset (LPBOR).
  • Windowed Watchdog Timer (WWDT) Memory.
  • Up to 14 KB of Program Flash Memory.
  • Up to 1 KB of Data SRAM Memory.
  • Me.

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Datasheet preview – PIC16F13145

Datasheet Details

Part number PIC16F13145
Manufacturer Microchip
File Size 9.68 MB
Description Microcontrollers
Datasheet download datasheet PIC16F13145 Datasheet
Additional preview pages of the PIC16F13145 datasheet.

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Full PDF Text Transcription

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PIC16F13145 Family Full-Featured 8/14/20-Pin Microcontrollers PIC16F13145 Family Introduction The PIC16F13145 microcontroller family, with its focused set of peripherals, provides an effective method to implement hardware-based solutions. This device family introduces the Configurable Logic Block (CLB) peripheral, enabling users to incorporate hardware-based custom logic into their applications. The CLB is comprised of 32 individual logic elements. Each logic element’s Look Up Table (LUT) based design offers vast customization options, and CPU-independent operation improves the response time and power consumption. This product family is available in 8, 14, and 20-pin packages and offers up to 14 KB of Program Flash Memory with up to 1 KB of RAM.
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