PIC18F56K42
Description
The PIC18(L)F26/27/45/46/47/55/56/57K42 microcontrollers are available in 28/40/44/48-pin devices.
Key Features
- C piler Optimized RISC Architecture
- Operating Speed
- Up to 64 MHz clock input
- 62.5 ns minimum instruction cycle
- Two Direct Memory Access (DMA) Controllers
- Data transfers to SFR/GPR spaces from either Program Flash Memory, Data EEPROM or SFR/GPR spaces
- User-programmable source and destination sizes
- Hardware and software-triggered data transfers
- System Bus Arbiter with User-Configurable Priorities for Scanner and DMA1/DMA2 with respect to the main line and interrupt execution
- Vectored Interrupt Capability - Selectable high/low priority - Fixed interrupt latency - Programmable vector table base address
