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SAMS70N19 - 32-bit ARM Cortex-M7 MCUs

Download the SAMS70N19 datasheet PDF. This datasheet also covers the SAME70 variant, as both devices belong to the same 32-bit arm cortex-m7 mcus family and are provided as variant models within a single manufacturer datasheet.

Features

  • Core.
  • Arm® Cortex®-M7 running at up to 300 MHz.
  • 16 Kbytes of I-Cache and 16 Kbytes of D-Cache with Error Code Correction (ECC).
  • Single-precision and double-precision HW Floating Point Unit (FPU).
  • Memory Protection Unit (MPU) with 16 zones.
  • DSP Instructions, Thumb®-2 Instruction Set.
  • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU) Memories.
  • Up to 2048 Kbytes embedded Flash with uni.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SAME70-Microchip.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SAMS70N19
Manufacturer Microchip
File Size 17.29 MB
Description 32-bit ARM Cortex-M7 MCUs
Datasheet download datasheet SAMS70N19 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
32-bit Arm Cortex-M7 MCUs with FPU, Audio and Graphics Interfaces, High-Speed USB, Ethernet, and Advanced Analog SAM E70/S70/V70/V71 Features Core • Arm® Cortex®-M7 running at up to 300 MHz • 16 Kbytes of I-Cache and 16 Kbytes of D-Cache with Error Code Correction (ECC) • Single-precision and double-precision HW Floating Point Unit (FPU) • Memory Protection Unit (MPU) with 16 zones • DSP Instructions, Thumb®-2 Instruction Set • Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU) Memories • Up to 2048 Kbytes embedded Flash with unique identifier and user signature for user-defined data • Up to 384 Kbytes embedded Multi-port SRAM • Tightly Coupled Memory (TCM) • 16 Kbytes ROM with embedded Bootloader routines (UART0, USB) and IAP routines • 1
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