TP2424 Overview
The TP2424 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This bination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and...
TP2424 Key Features
- Low Threshold
- High Input Impedance
- Low Input Capacitance
- Fast Switching Speeds
- Free from Secondary Breakdown
- Low Input and Output Leakage
TP2424 Applications
- Logic-Level Interfaces (Ideal for TTL and CMOS)
