dsPIC33CH64MP206
Key Features
- Four ADC Modules: - One module for Main core - Three modules for Secondary core - 12-bit, 3.5 Msps ADC - Up to 18 conversion channels
- Three PGA Modules: - Three modules for Secondary core - Can be read by Host ADC - Option to interface with Host ADC
- Three UART Modules: - Two modules for Main core - One module for Secondary core - Support for LIN/J2602 protocols
- Three 4-Wire SPI/I2S Modules: - Two modules for Main core - One module for Secondary core
- CAN Flexible Data-Rate (FD) Module for the MainCore
- Three I2C Modules: - Two modules for Main - One module for Secondary - Support for SMBus
- PPS to Allow Function Remap
- Programmable Cyclic Redundancy Check (CRC)
- Two SENT Modules for the Main
- Eight DMA Channels: - Six DMA channels available for the Main core - Two DMA channels available for the Secondary core
