Description
Pin Name
Pin Number PDIP SOIC
Pin Type
Buffer Type
Description
16XCLK TX RX VSS RESET
RXIR TXIR VDD Legend:
1
1
I
ST 16x external clock source input
2
2
I
ST Asynchronous receive from Host Controller UART
3
3
O
Asynchronous transmit to Host Controller UART
4
4
P Gro
Features
- Pinout compatible with HSDL-7000.
- Compliant with IrDA® Standard Physical Layer
Specification (version 1.3).
- UART to IrDA Standard Encoder/Decoder
- Interfaces with IrDA Standard Compliant Transceiver.
- Baud Rates: - Up to IrDA Standard 115.2 Kbaud Operation.
- Transmit/Receive Formats (Bit Width) Supported: - 1.63 µs.
- Low-power Mode (2 µA at 1.8V, +125°C).
- Pb-free packaging
CMOS Technology.
- Low-voltage operation.
- Exte.
MCP2122_MicrochipTechnology.pdf
