JS28F256P30BFF Datasheet | Micron Technology

Features Micron Parallel NOR Flash Embedded Memory (P30-65nm) JS28F256P30B/TFx, RC28F256P30B/TFx, PC28F256P30B/TFx, RD48F4400P0VBQEx, RC48F4400P0VB0Ex, PC48F4400P0VB0Ex, PF48F4000P0ZB/TQEx Features - High performance - 100ns initial access for Easy BGA - 110ns initial access for TSOP - 25ns 16-word asychronous page read mode - 52 MHz (Easy BGA) with zero WAIT states and 17ns clock-to-data output synchronous burst read mode - 4-, 8-, 16-, and continuous word options for burst mode - Buffered enhanced factory programming (BEFP) at 2 MB/s (TYP) using a 512-word buffer - 1.8V buffered programming at 1.14 MB/s (TYP) using a 512-word buffer - Architecture - MLC: highest density at lowest cost - Asymmetrically blocked architecture - Four 32KB parameter blocks: top or bottom configuration - 128KB main blocks - Blank check to verify an erased block - Voltage and power - VCC (core) voltage: 1.7V to 2.0V - VCCQ (I/O)...