N25Q032A11E124xx
Key Features
- 8V, Multiple I/O, 4KB Sector Erase N25Q032A11E124xx, N25Q032A11EF440x, N25Q032A11ESE40x, N25Q032A11ESF40x, N25Q032A11EF840x, N25Q032A11EF640x Features * * * * *
- SPI-compatible serial bus interface 108 MHz (MAX) clock frequency 1.7-2.0V single supply voltage Dual/quad I/O instruction provides increased throughput up to 432 MHz Supported protocols - Extended SPI, dual I/O, and quad I/O Execute-in-place (XIP) mode for all three protocols - Configurable via volatile or nonvolatile registers - Enables memory to work in XIP mode directly after power-on PROGRAM/ERASE SUSPEND operations Continuous read of entire memory via a single command - Fast read - Quad or dual output fast read - Quad or dual I/O fast read Flexible to fit application - Configurable number of dummy cycles - Output buffer configurable Software reset 64-byte, user-lockable, one-time programmable (OTP) dedicated area Erase capability - Subsector erase 4KB uniform granularity blocks - Sector erase 64KB uniform granularity blocks - Full-chip erase
- Write protection - Software write protection applicable to every 64KB sector via volatile lock bit - Hardware write protection: protected area size defined by four nonvolatile bits (BP0, BP1, BP2, and TB) - Additional smart protections, available upon request
- Electronic signature - JEDEC-standard 2-byte signature (BB16h) - Unique ID code (UID): 17 read-only bytes, including:
- Two additional extended device ID (EDID) bytes to identify device factory options
- Customized factory data (14 bytes)
- Minimum 100,000 ERASE cycles per sector
- More than 20 years data retention
- Packages JEDEC standard, all RoHS compliant - F4 = UF-PDFN-8 4mm x 3mm (MLP8 4mm x 3mm) - F6 = V-PDFN-8 6mm x 5mm ( MLP8 6mm x 5mm ) - F8 = V-PDFN-8 8mm x 6mm (MLP8 8mm x 6mm) - 12 = T-PBGA-24b05 6mm x 8mm - SF = SOP2-16 300 mils body w
