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MT4LC4M16F5 - DRAM

Description

The 4 Meg x 16 DRAM is a high-speed CMOS, dynamic random-access memory device containing 67,108,864 bits organized in a x16 configuration.

The MT4LC4M16F5 is functionally organized as 4,194,304 locations containing 16 bits each.

Features

  • Single +3.3V ±0.3V power supply.
  • Industry-standard x16 pinout, timing, functions, and packages.
  • 12 row, 10 column addresses.
  • High-performance CMOS silicon-gate process.
  • All inputs, outputs and clocks are LVTTL-compatible.
  • FAST PAGE MODE (FPM) access.
  • 4,096-cycle CAS#-BEFORE-RAS# (CBR).

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4 MEG x 16 FPM DRAM DRAM MT4LC4M16F5 For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/ datasheet.html FEATURES • Single +3.3V ±0.
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