MT4LC4M4A1, MT4LC4M4B1 Datasheet - Micron Technology

MT4LC4M4A1 DRAM

The 4 Meg x 4 DRAM is a randomly accessed, solidstate memory containing 16,777,216 bits organized in a x4 configuration. RAS# is used to latch the row address (first 11 bits for 2K and first 12 bits for 4K). Once the page has been opened by RAS#, CAS# is used to latch the column address (the latter .

MT4LC4M4A1 Features

* Industry-standard x4 pinout, timing, functions, and packages

* High-performance, low-power CMOS silicon-gate process

* Single power supply (+3.3V ±0.3V or +5V ±0.5V)

* All inputs, outputs and clocks are TTL-compatible

* Refresh modes: RAS#-ONLY, HIDDEN and C

MT4LC4M4B1_MicronTechnology.pdf

MT4LC4M4A1 Datasheet Preview — This datasheet PDF includes multiple part numbers: MT4LC4M4A1, MT4LC4M4B1. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

MT4LC4M4A1, MT4LC4M4B1

Manufacturer:

Micron Technology

File Size:

360.24 KB

Description:

Dram.

Note:

This datasheet PDF includes multiple part numbers: MT4LC4M4A1, MT4LC4M4B1.
Please refer to the document for exact specifications by model.

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MT4LC4M4A1 MT4LC4M4B1 DRAM Micron Technology

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