EDI88512CA Datasheet - Microsemi

512Kx8 Monolithic SRAM

EDI88512CA Features

*  Access Times of 15, 17, 20, 25, 35, 45, 55ns

*  Data Retention Function (LPA version)

*  TTL Compatible Inputs and Outputs

*  Fully Static, No Clocks

*  Organized as 512Kx8

*  Commercial, Industrial and Military Temperature Ranges

*  32 lead JEDEC Approved Evolutionary

EDI88512CA General Description

Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power (+5V ±10%) Ground Not Connected BLOCK DIAGRAM Memory Array A0-18 WE# CS# OE# Address Buffer Address Decoder I/O Circuits I/O0-7 Microsemi Corporation reserves the right to change products or speciﬁcations witho.

EDI88512CA Datasheet (580.66 KB)