ZL30157 Overview
11 3.0 Application Example . 15 4.0 Functional Description . 16 4.2 Input Reference Monitoring.
ZL30157 Key Features
- Two independent clock channels
- Programmable synthesizers generate any clockrate from 1 kHz to 750 MHz
- One precision synthesizers generate clocks with jitter below 0.7 ps RMS for 10 G PHYs
- One general purpose synthesizers generate a wide range of digital bus clocks
- Programmable digital PLLs synchronize to any clock rate from 1 kHz to 750 MHz
- Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates
- Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz, 112 Hz, 224 Hz, 448 Hz or 896 Hz
- Automatic hitless reference switching and digital holdover on reference fail
- Four reference inputs configurable as single ended or differential
- Eight LVPECL outputs and four LVCMOS outputs