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ZL30244 - Dual-Channel Any-to-Any Clock Multiplier and Frequency Synthesizer

General Description

5.

External EEPROM or No EEPROM 10 5.3.2 ZL30245 Internal EEPROM 11 5.4 LOCAL OSCILLATOR OR CRYSTAL

Key Features

  • Two Independent APLL Channels.
  • Four Input Clocks Per Channel.
  • One crystal/CMOS input.
  • Two differential/CMOS inputs.
  • One single-ended/CMOS input.
  • Any input frequency from 9.72MHz to 1250MHz (9.72MHz to 300MHz for CMOS).
  • Clock selection by pin or register control.
  • Low-Jitter Fractional-N APLL and 3 Outputs Per Channel.
  • Any output frequency from.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Register Map: Section 6.2 Features • Two Independent APLL Channels • Four Input Clocks Per Channel • One crystal/CMOS input • Two differential/CMOS inputs • One single-ended/CMOS input • Any input frequency from 9.72MHz to 1250MHz (9.72MHz to 300MHz for CMOS) • Clock selection by pin or register control • Low-Jitter Fractional-N APLL and 3 Outputs Per Channel • Any output frequency from <1Hz to 1035MHz • High-resolution fractional frequency conversion with 0ppm error • Easy-to-configure, encapsulated design requires no external VCXO or loop filter components • Each output has independent dividers • Output jitter as low as 0.