ZL30252 Overview
Register Map: Section.
ZL30252 Key Features
- Input Clocks
- Three inputs: two differential/CMOS, one CMOS
- Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS)
- Inputs continually monitored for activity and frequency accuracy
- Automatic or manual reference switching
- Low-Bandwidth DPLL
- Programmable bandwidth, 14Hz to 500Hz
- Attenuates jitter up to several UI
- Freerun or digital hold on loss of all inputs
- Digitally controlled phase adjustment
ZL30252 Applications
- Frequency conversion, jitter attenuation and frequency synthesis in a wide variety of equipment types