Description
9
5. FUNCTIONAL DESCRIPTION 11
5.1 DEVICE IDENTIFICATION 11 5.2 TOP-LEVEL CONFIGURATION 11
5.2.1 APLL-Only Mode 11 5.2.2 DPLL+APLL Mode 12 5.2.3 Evaluation Software for Device Configuration 13
5.3 PIN-CONTROLLED AUTOMATIC CONFIGURATION AT RESET
Features
- Input Clocks.
- Three inputs: two differential/CMOS, one CMOS.
- Any input frequency from 1kHz to 1250MHz (1kHz to 300MHz for CMOS).
- Inputs continually monitored for activity and frequency accuracy.
- Automatic or manual reference switching.
- Low-Bandwidth DPLL.
- Programmable bandwidth, 14Hz to 500Hz.
- Attenuates jitter up to several UI.
- Freerun or digital hold on loss of all inputs.
- Digitally controlled phase adju.
ZL30253 Datasheet
