a 25mV offset and 40-µV/°C drift. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information).
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LS842. For precise diagrams, and layout, please refer to the original PDF.
LS842 MONOLITHIC DUAL N-CHANNEL JFET Linear Systems Ultra Low Leakage Low Drift Monolithic Dual JFET The LS842 is a high-performance monolithic dual JFET featuring extrem...
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The LS842 is a high-performance monolithic dual JFET featuring extremely low noise, tight offset voltage and low drift over temperature specifications, and is targeted for use in a wide range of precision instrumentation applications. The LS842 features a 25mV offset and 40-µV/°C drift. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). FEATURES LOW DRIFT | V GS1‐2 / T| ≤40µV/°C LOW LEAKAGE IG = 10pA TYP. LOW NOISE en = 8nV/√Hz TYP.
LS842 Datasheet
