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M2V64S40BTP-7L Datasheet 64M bit Synchronous DRAM

Manufacturer: Mitsubishi Electric

Download the M2V64S40BTP-7L datasheet PDF. This datasheet also includes the M2V64S20BTP-7 variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (M2V64S20BTP-7-Mitsubishi.pdf) that lists specifications for multiple related part numbers.

General Description

The M2V64S20BTP is organized as 4-bank x 4194304-word x 4-bit, M2V64S30BTP is organized as 4-bank x 2097152-word x 8-bit, and M2V64S40BTP is organized as 4-bank x 1048576-word x 16-bit Synchronous DRAM with LVTTL interface.

All inputs and outputs are referenced to the rising edge of CLK.

The M2V64S20BTP, M2V64S30BTP, M2V64S40BTP achieve very high speed data rate up to 125MHz, and are suitable for main memory or graphic memory in computer systems.

Overview

SDRAM (Rev.1.2) Apr.

'99 64M bit Synchronous DRAM MITSUBISHI LSIs M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT) M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT).

Key Features

  • - Single 3.3v ± 0.3v power supply - Clock frequency 125MHz /100MHz - Fully synchronous operation referenced to clock rising edge - 4 bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/Full Page (programmable) - Burst type- sequential / interleave (programmable) - Column access - random - Burst Write / Single Write (programmable) - Auto precharge / All bank precharge controlled by A10 - Auto refresh and Self refresh - 4096 refresh cycle.

More Datasheets from Mitsubishi Electric

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M2V64S40BTP-7 64M bit Synchronous DRAM
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