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M66252FP - 1152 x 8-BIT LINE MEMORY FIFO

General Description

The M66252P/FP is a high-speed line memory with a FIFO (First In First Out) structure of 1152-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology.

Key Features

  • Memory construction 1152words x 8bits (dynamic memory).
  • High-speed cycle 50ns (min. ).
  • High-speed access 40ns (max. ).
  • Output hold 5ns (min. ).
  • Fully independent, asynchronous write and read operations.
  • Variable-length delay bit.
  • Output 3-state.

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M66252P 1152 x 8-BIT LINE MEMORY FIFO
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MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉 M66252P/FP M66252P/FP 1152 x 8-BIT LINE MEMORY (FIFO) 1152 x 8-BIT LINE MEMORY (FIFO) DESCRIPTION The M66252P/FP is a high-speed line memory with a FIFO (First In First Out) structure of 1152-word × 8-bit configuration which uses high-performance silicon gate CMOS process technology. It has separate clock, enable and reset signals for write and read and is most suitable as a buffer memory between devices with different data processing throughput. FEATURES • Memory construction ........................................................ ............................. 1152words x 8bits (dynamic memory) • High-speed cycle ............................................ 50ns (min.) • High-speed access ........................................