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Mosel Vitelic  Corp
Mosel Vitelic Corp

V62C1161024L-70T Datasheet Preview

V62C1161024L-70T Datasheet

Ultra Low Power 64K x 16 CMOS SRAM

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V62C1161024L-70T pdf
V62C1161024L(L)
Ultra Low Power
64K x 16 CMOS SRAM
Features
Functional Description
• Ultra Low-power consumption
- Active: 30mA ICC at 70ns
- Stand-by: 5 µA (CMOS input/output)
1 µA (CMOS input/output, L version)
• 70/85/100/120 ns access time
• Equal access and cycle time
• Single +1.8V to 2.2V Power Supply
• Tri-state output
• Automatic power-down when deselected
The V62C1161024L is a Low Power CMOS Static RAM
organized as 65,536 words by 16 bits. Easy memory exp-
ansion is provided by an active LOW (CE) and (OE) pin.
This device has an automatic power-down mode feature
when deselected. Separate Byte Enable controls (BLE
and BHE) allow individual bytes to be accessed. BLE
controls the lower bits I/O1 - I/O8. BHE controls the
upper bits I/O9 - I/O16.
Writing to these devices is performed by taking Chip
Enable (CE) with Write Enable (WE) and Byte Enable
(BLE/BHE) LOW.
• Multiple center power and ground pins for
improved noise immunity
• Individual byte controls for both Read and
Write cycles
Reading from the device is performed by taking Chip
Enable (CE) with Output Enable (OE) and Byte Enable
(BLE/BHE) LOW while Write Enable (WE) is held
HIGH.
• Available in 44 pin TSOP (II) Package
Logic Block Diagram
TSOP(II)
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
I/O1 - I/O8
I/O9 - I/O16
WE
OE
BHE
BLE
CE
Pre-Charge Circuit
Memory Array
1024 X 1024
Vcc
Vss
Data
Cont I/O Circuit
Data
Cont
Column Select
A10 A11 A12 A13 A14 A15
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
I/O1 7
I/O2 8
I/O3 9
I/O4 10
Vcc 11
Vss 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
WE 17
A15 18
A14 19
A13 20
A12 21
NC 22
44 A5
43 A6
42 A7
41 OE
40 BHE
39 BLE
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 Vss
33 Vcc
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
REV. 1.1 April 2001 V62C1161024L(L)
1



Mosel Vitelic  Corp
Mosel Vitelic Corp

V62C1161024L-70T Datasheet Preview

V62C1161024L-70T Datasheet

Ultra Low Power 64K x 16 CMOS SRAM

No Preview Available !

V62C1161024L-70T pdf
V62C1161024L(L)
Absolute Maximum Ratings *
Parameter
Voltage on Any Pin Relative to Gnd
Power Dissipation
Storage Temperature (Plastic)
Temperature Under Bias
Symbol
Vt
PT
Tstg
Tbias
Minimum
-0.5
-55
-40
Maximum
+4.0
1.0
+150
+85
Unit
V
W
0C
0C
* Note: Stresses greater than those listed above Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rat-
ing only and function operation of the device at these or any other conditions outside those indicated in the operational sections of this spec-
ification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect reliability.
Truth Table
CE OE WE BLE BHE I/O1-I/O8 I/O9-I/O16
H X X X X High-Z
High-Z
L L H L H Data Out High-Z
L L H H L High-Z Data Out
L L H L L Data Out Data Out
L X L L L Data In Data In
L X L L H Data In High-Z
L X L H L High-Z Data In
L H H X X High-Z
High-Z
L X X H H High-Z High-Z
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Mode
Standby
Low Byte Read
High Byte Read
Word Read
Word Write
Low Byte Write
High Byte Write
Output Disable
Output Disable
* Key: X = Don’t Care, L = Low, H = High
Recommended Operating Conditions (TA = 0oC to +70oC / -40oC to 85oC**)
Parameter
Supply Voltage
Input Voltage
Symbol Min
Typ
Max
Unit
VCC 1.8 2.0
Gnd 0.0 0.0
2.2
0.0
V
V
VIH 1.6 - VCC + 0.2 V
VIL -0.5* - 0.4 V
* VIL min = -2.0V for pulse width less than tRC/2.
** For Industrial Temperature
REV. 1.1 April 2001 V62C1161024L(L)
2


Part Number V62C1161024L-70T
Description Ultra Low Power 64K x 16 CMOS SRAM
Maker Mosel Vitelic Corp
Total Page 10 Pages
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V62C1161024L-70T pdf
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V62C1161024L-70T pdf





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