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Mosel Vitelic  Corp
Mosel Vitelic Corp

V62C2802048L-100T Datasheet Preview

V62C2802048L-100T Datasheet

Ultra Low Power 256K x 8 CMOS SRAM

No Preview Available !

V62C2802048L-100T pdf
V62C2802048L(L)
Ultra Low Power
256K x 8 CMOS SRAM
Features
• Low-power consumption
- Active: 35mA at 55ns
- Stand-by: 10 µA (CMOS input/output)
2 µA CMOS input/output, L version
• Single +2.2 to 2.7V Power Supply_Typical
• Extented Voltage from 2.2 to 3.6V.
• Equal access and cycle time
• 55/70/85/100 ns access time
• Easy memory expansion with CE1, CE2
and OE inputs
• 1.0V data retention mode
• TTL compatible, Tri-state input/output
• Automatic power-down when deselected
• Package available: 32L TSOP(I)/ STSOP(I)
• 48 Ball CSP_BGA
Functional Description
The V62C2802048L is a low power CMOS Static RAM
organized as 262,144 words by 8 bits. Easy memory exp-
ansion is provided by an active LOW CE1, an active
HIGH CE2, an active LOW OE, and Tri-state I/O’s. This
device has an automatic power-down mode feature when
deselected.
Writing to the device is accomplished by taking Chip
Enable 1 (CE1) with Write Enable (WE) LOW, and Chip
Enable 2 (CE2) HIGH. Reading from the device is per-
formed by taking Chip Enable 1 (CE1) with Output
Enable (OE) LOW while Write Enable (WE) and Chip
Enable 2 (CE2) is HIGH. The I/O pins are placed in a
high-impedance state when the device is deselected: the
outputs are disabled during a write cycle.
TheV62C2802048LL comes with a 1V data retention fe-
ature and Lower Standby Power. The V62C2802048L is
avalable in a 32-pin 8 x 20 mm TSOP1 / STSOP 8x13.4 mm
and CSP type 48-fpBGA packages.
Logic Block Diagram
32-Pin TSOP1 / STSOP (CSP_BGA See next page)
INPUT BUFFER
A0
A1
A2
A3
A4
A5 Cell Array
A6
A7
A8
A9
COLUMN DECODER
A10 A11 A12 A13 A14 A15 A16 A17
I/O8
I/O1
CONTROL
CIRCUIT
OE
WE
CE1
CE2
A11
A9
A8
A13
WE
CE2
A15
Vcc
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
REV. 1.2 May 2001 V62C2802048L(L)
1
32 OE
31 A10
30 CE1
29 I/O8
28 I/O7
27 I/O6
26 I/O5
25 I/O4
24 GND
23 I/O3
22 I/O2
21 I/O1
20 A0
19 A1
18 A2
17 A3



Mosel Vitelic  Corp
Mosel Vitelic Corp

V62C2802048L-100T Datasheet Preview

V62C2802048L-100T Datasheet

Ultra Low Power 256K x 8 CMOS SRAM

No Preview Available !

V62C2802048L-100T pdf
V62C2802048L(L)
MOSEL VITELIC V62C2802048L(L)B
1 23 4 5 6
1
A A0
B I/O5
C I/O6
23
A1 CS2
A2 WE
NC
NC
4
A3
A4
A5
56
A6 A8
A7 I/O1
NC
I/O2
D VSS
E VCC
NC
NC
NC
NC
NC
NC
NC VCC
NC
VSS
Top View
F I/O7
NC
NC
A17
G I/O8
OE
CS1
A16
H A9
A10
A11
Note: NC means no Ball.
A12
Top View
NC
I/O3
A15
A13
I/O4
A14
48 Ball - 9x12 fpBGA (Ultra Low Power)
PACKAGE OUTLINE DWG.
SIDE VIEW
aaa
D
D1
6
5
4
3
2
1
A BCDE FGH
BOTTOM VIEW
b
SOLDER BALL
SYMBOL
A
A1
b
c
D
D1
E
E1
e
aaa
UNIT:MM
1.05+0.15
0.25+0.05
0.35+.05
0.30(TYP)
12.00+0.10
5.25
9.00+0.10
3.75
0.75TYP
0.10
REV. 1.2 May 2001 V62C2802048L(L)
2


Part Number V62C2802048L-100T
Description Ultra Low Power 256K x 8 CMOS SRAM
Maker Mosel Vitelic Corp
Total Page 10 Pages
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