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74LS290 - 4-BIT BINARY COUNTER

This page provides the datasheet information for the 74LS290, a member of the 74LS293 4-BIT BINARY COUNTER family.

Description

The LS290 and LS293 are 4-bit ripple type Decade, and 4-Bit Binary counters respectively.

Each device consists of four master/ slave flip-flops which are internally connected to provide a divide-by-two section and a divide-by-five (LS290) or divide-by-eight (LS293) section.

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📁 Similar Datasheet

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Other Datasheets by Motorola
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Full PDF Text Transcription

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DECADE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS290 and SN54/ 74LS293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS290) or divide-by-eight (LS293) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together (Q to CP)to form BCD, Bi-quinary, or Modulo-16 counters. Both of the counters have a 2-input gated Master Reset (Clear), and the LS290 also has a 2-input gated Master Set (Preset 9). • Corner Power Pin Versions of the LS90 and LS93 • Low Power Consumption . . . Typically 45 mW • High Count Rates . . . Typically 42 MHz • Choice of Counting Modes . . .
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