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Motorola Electronic Components Datasheet

MC100EL29 Datasheet

Dual Differential Data and Clock D Flip-Flop

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Differential Data and Clock
D Flip-Flop With Set and Reset
MC100LVEL29
MC100EL29
The MC100LVEL29 is a dual master–slave flip flop. The device
features fully differential Data and Clock inputs as well as outputs. The
MC100EL29 is pin and functionally equivalent to the MC100LVEL29 but
is specified for operation at the standard 100E ECL voltage supply. A VBB
output is provided for AC coupling, refer to the interfacing section of the
ECLinPS Data Book (DL140) for more information on AC coupling ECL
signals. Data enters the master latch when the clock is LOW and
transfers to the slave upon a positive transition on the clock input.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs are left
open the D input will pull down to VEE and the D input will bias around
VCC/2. The outputs will go to a defined state, however the state will be
random based on how the flip flop powers up.
Both flip flops feature asynchronous, overriding Set and Reset inputs.
Note that the Set and Reset inputs cannot both be HIGH simultaneously.
20
1
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
1100MHz Flip–Flop Toggle Frequency
20–lead SOIC Package
580ps Propagation Delays
TRUTH TABLE
Logic Diagram and Pinout: 20-Lead SOIC (Top View)
R S D CLK Q
Q
R0 VCC Q0 Q0 S0 S1 VCC Q1 Q1 VEE
20 19 18 17 16 15 14 13 12 11
QQ
RS
D CLK
QQ
SR
D CLK
LLL
L LH
HLX
LHX
HHX
ZL H
ZH
L
XL
H
XH
L
X Undef Undef
Z = LOW to HIGH Transition
PIN NAMES
1 2 3 4 5 6 7 8 9 10
D0 D0 CLK0 CLK0 VBB D1 D1 CLK1 CLK1 R1
MC100LVEL29
DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
Pins
D0–D1
R0–R1
CLK0–CLK1
S0–S1
Function
Data Inputs
Reset Inputs
Clock Inputs
Set Inputs
–40°C
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VBB
IIH
IIL
Power Supply Current
35 50
35 50
35 50
35 50 mA
Output Reference Voltage
–1.38
–1.26 –1.38
–1.26 –1.38
–1.26 –1.38
–1.26 V
Input HIGH Current
150 150 150 150 µA
Input LOW Current Dn Inputs 0.5
Dn Inputs –300
0.5
–300
0.5
–300
0.5
–300
µA
7/95
© Motorola, Inc. 1996
4–1
REV 1


Motorola Electronic Components Datasheet

MC100EL29 Datasheet

Dual Differential Data and Clock D Flip-Flop

No Preview Available !

MC100LVEL29 MC100EL29
MC100LVEL29
AC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND)
–40°C
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
fMAX Maximum Toggle
1.1
1.1
1.1
1.1 GHz
Frequency
tPLH
tPHL
tS
tH
tRR
tPW
Propagation Delay CLK
to Output
S, R
Setup Time
Hold Time
Set/Reset Recovery
Minimum Pulse Width
CLK, Set, Reset
480
480
0
100
100
400
680 490
700 490
0
100
100
400
690 500
710 500
0
100
100
400
700 520
720 520
0
100
100
400
720 ps
740
ps
ps
ps
VPP
VCMR1
Minimum Input Swing
Common VPP<500mV
Mode RangeVPP500mV
150
–2.0
–1.8
150
–0.4 –2.1
–0.4 –1.9
150
–0.4 –2.1
–0.4 –1.9
150
–0.4 –2.1
–0.4 –1.9
mV
–0.4 V
–0.4
tr Output Rise/Fall Times Q 280
tf (20% – 80%)
550 280
550 280
550 280
550 ps
1. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|.
MC100EL29
DC CHARACTERISTICS (VEE = –4.2V to –5.5V; VCC = GND)
–40°C
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VBB
IIH
IIL
Power Supply Current
35 50
35 50
35 50
35 50 mA
Output Reference Voltage
–1.38
–1.26 –1.38
–1.26 –1.38
–1.26 –1.38
–1.26 V
Input HIGH Current
150 150 150 150 µA
Input LOW Current Dn Inputs 0.5
Dn Inputs –300
0.5
–300
0.5
–300
0.5
–300
µA
MC100EL29
AC CHARACTERISTICS (VEE = –4.2V to –5.5V; VCC = GND)
–40°C
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
fMAX Maximum Toggle
1.1
1.1
1.1
1.1 GHz
Frequency
tPLH
tPHL
tS
tH
tRR
tPW
Propagation Delay CLK
to Output
S, R
Setup Time
Hold Time
Set/Reset Recovery
Minimum Pulse Width
CLK, Set, Reset
480
480
0
100
100
400
680 490
700 490
0
100
100
400
690 500
710 500
0
100
100
400
700 520
720 520
0
100
100
400
720 ps
740
ps
ps
ps
VPP
VCMR1
Minimum Input Swing
Common VPP<500mV
Mode RangeVPP500mV
150
–3.2
–3.0
150
–0.4 –3.3
–0.4 –3.1
150
–0.4 –3.3
–0.4 –3.1
150
–0.4 –3.3
–0.4 –3.1
mV
–0.4 V
–0.4
tr Output Rise/Fall Times Q 280
tf (20% – 80%)
550 280
550 280
550 280
550 ps
1. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within
the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The
numbers in the spec table assume a nominal VEE = –4.5V. Note for PECL operation, the VCMR(min) will be fixed at 5.0V – |VCMR(min)|.
MOTOROLA
4–2 ECLinPS and ECLinPS Lite
DL140 — Rev 3


Part Number MC100EL29
Description Dual Differential Data and Clock D Flip-Flop
Maker Motorola
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MC100EL29 Datasheet PDF






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