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MC100ELT24 - TTL to Differential ECL Translator

General Description

PIN Q D VCC VEE GND FUNCTION Diff ECL

Key Features

  • The ELT24 is available in both ECL standards: the 10ELT is compatible with MECL 10H logic levels while the 100ELT is compatible with ECL 100K logic levels.
  • 1.2ns Typical Propagation Delay.
  • Differential PECL Outputs.
  • Small Outline SOIC Package.
  • PNP TTL Inputs for Minimal Loading.
  • Flow Through Pinouts LOGIC.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA TTL to Differential ECL Translator The MC10ELT/100ELT24 is a TTL to differential ECL translator. Because ECL levels are used a +5V, -5.2V (or -4.5V) and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT24 makes it ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT24 is available in both ECL standards: the 10ELT is compatible with MECL 10H logic levels while the 100ELT is compatible with ECL 100K logic levels. • 1.