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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
6ĆBit D Latch
The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low.
• 800ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.