Datasheet Summary
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
6ĆBit D Latch
The MC10E/100E150 contains six D-type latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent and input data transitions propagate through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master Reset (MR) overrides all other controls to set the Q outputs low.
- 800ps Max. Propagation Delay
- Extended 100E VEE Range of
- 4.2V to
- 5.46V
- 75kΩ Input Pulldown Resistors
LOGIC DIAGRAM
D0 D
Q0
R Q0
MC10E150 MC100E150
6-BIT D LATCH
D1 D
Q1
R Q1
D2 D
Q2
R Q2
FN SUFFIX PLASTIC PACKAGE
CASE 776-02
D3 D
Q3
R Q3
D4 D
Q4
R Q4
D5...
