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MCM51L4256A - 256K x 4 CMOS DRAM

Download the MCM51L4256A datasheet PDF. This datasheet also covers the MCM514256A variant, as both devices belong to the same 256k x 4 cmos dram family and are provided as variant models within a single manufacturer datasheet.

Features

  • 256A-70 MCM514256A-80 MCM51L4256A-70 MCM51L4256A-80 Parameter Std Alt Min Max Min Max Unit Notes Column Address Hold Time tCELAX tCAH 15.
  • 15.
  • ns Column Address Hold Time Referenced to RAS tRELAX tAR 55.
  • 60.
  • ns Column Address to RAS Lead Time tAVREH tRAL 35.
  • 40.
  • ns Read Command Setup Time tWHCEL tRCS 0.
  • ns Read Command Hold Time tCEHWX tRCH 0.
  • ns 13 Read Command.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MCM514256A_Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA 256K x 4 Bit CMOS Dynamic RAM Page Mode, Commercial and Industrial Temperature Range The MCM514256A is a 1.0ยต CMOS high-speed dynamic random access memory. It is organized as 262,144 four-bit words and fabricated with CMOS silicon-gate process technology. Advanced circuit design and fine line processing provide high performance, improved reliability, and low cost. The MCM514256A requires only nine address lines; row and column address inputs are multiplexed. The device is packaged in a 300 mil SOJ plastic package.
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